1. Field of the Invention
The present invention relates to a plasma display device that can be suitably used as a flat display and more particularly to the plasma display device being capable of preventing a faithful reproduction in image from be disturbed when its resolution is switched.
The present application claims priority of Japanese Patent Application No. 2001-397476 filed on Dec. 27, 2001, which is hereby incorporated by reference.
2. Description of the Related Art
When resolution is switched by a remote control unit or by a switch of a main body of a display device or a like, for example, when a signal to be input to the display device is switched from a video signal fed from a personal computer to a video signal fed from a video deck, though the input signal can be switched immediately, since an operational mode signal is discriminated by a microcomputer, a time delay occurs before a result from the discrimination is output. As a result, a state occurs in which the input signal temporarily does not match up with the operational mode signal and, during the state, an incorrect signal is output. However, since the microcomputer can output a muting signal with timing when a switching operation is performed, it is possible to prevent a faithful reproduction in image from being disturbed.
On the other hand, in recent years, as enhancement of resolution becomes possible through processing by a personal computer, in many cases, resolution is switched while an image is being displayed. That is, the switching of resolution is done without switching operations by using a remote control unit or by a switch of a main body of the display device, for example, resolution is switched while cables of a personal computer are being connected. In such the case, according to a conventional circuit configuration, though an input signal can be switched immediately, a mode signal is discriminated by a microcomputer. Due to this, a time delay occurs in transmission of the mode signal and an image muting signal is not output from the microcomputer which causes outputting of an incorrect signal. As a result, an inconvenience including disturbance of faithfully reproduction images and imposition of a load exceeding a supply capability on a power supply circuit occurs.
To solve this problem, a display device is disclosed in, for example, Japanese Patent Application Laid-open No. Hei 7-134577in which, when a display mode is switched or a signal source is switched, an image being at a black level is displayed to prevent a faithful reproduction in image from being disturbed.
Moreover, a video display device is disclosed in Japanese Patent Application Laid-open No. Hei 9-135395 in which judgement as to whether or not a frequency of an input signal fed to a CRT (Cathode Ray Tube) is stable is made by a micro-control unit and if the input signal is not stable, a video signal is muted.
Furthermore, another display device is disclosed in Japanese Patent Application Laid-open No. 2000-137457 in which, when a deflection frequency of a video signal fed to a CRT is changed, muting of a video signal is performed.
Moreover, in recent years, as a thin and lightweight display device, a plasma display device is becoming commonly used. A method for driving a plasma display device is basically different from that for a CRT. That is, in the case of the plasma display device, a method in which a digitized video input signal is directly controlled is employed and one field period is divided into a plurality of sub-field periods and whether light is emitted or not during each sub-field period is determined according to a weight of a bit making up a video signal. Each of the sub-field periods is made up of a pre-discharging period, a scanning period, and a sustaining period and brightness in each sub-field period is determined by controlling a number of sustaining pulses in the sustaining period based on an average luminance level. For example, control is exerted in a manner that, if an average luminance level is judged to be low, a number of the sustaining pulses is increased to enhance peak luminance and, if the average luminance level is judged to be high, the number of the sustaining pulses is decreased to reduce power consumption.
FIG. 5 is a schematic block diagram showing conventional configurations of a display device being used when the display device on which an image being at a black level is displayed so as not to display unfaithful images reproduced in response to an incorrect signal, for example, when a signal source is switched is applied to a plasma display device.
In the conventional display device shown in FIG. 5, an analog video signal is converted into a digital signal by an A/D (Analog-to-Digital) converter 1 and is then input to a video signal processing circuit 2. To the video signal processing circuit 2 are further input a mode signal, a vertical sync signal, a horizontal sync signal, and an AD (Analog-digital) clock. The vertical sync signal is also input to a driving control circuit 3. To the driving control circuit 3 is further input a system clock. Also, to the driving control circuit 3 is input an average luminance level signal (not shown) obtained from arithmetic operations on an average luminance level, from the video signal processing circuit 2. Then, a plasma display panel (PDP) 4 is driven by digital video signals (output not shown) for RGB (Red, Green, and Blue) colors output from the video signal processing circuit 2 and driving signals output from the driving control circuit 3 or a like to display images.
Moreover, so long as resolution is switched by a remote control unit or a switch of a main body of the display device, what ever an input average luminance level value is, when a signal is switched, since an image is muted, a load exceeding a supply capability is not imposed on a power supply circuit (not shown).
However, the conventional display device has a problem in that, for example, if resolution is switched while cables of a computer are being connected, since several field periods to several tenth field periods are required for judgement of a mode, a video signal to be output from the video signal processing circuit 2 to the PDP 4 is not assured at all during these periods. In the video signal processing circuit 2, though an arithmetic operation on an average luminance level in one screen (during one field period) is performed, a result obtained from the arithmetic operation on an average luminance level is not assured until the judgement of a mode is firmly confirmed. Due to this, a contradiction occurs between a video signal to be output from the video signal processing circuit 2 to the PDP 4 and an average luminance level signal to be output from the video signal processing circuit 2 to the driving control circuit 3 based on the result obtained from the arithmetic operation on an average luminance level, As a result, there is a problem that, for example, a video signal causes display of a whole white image and an average luminance level signal causes display of an image providing a maximum luminance. In this case, excessive loads are imposed on the power source (not shown) and PDP 4.